Publications by the researcher in collaboration with Francisco Javier Andreo Oliver (4)

2026

  1. An Efficient-Energy Charge-Domain Convolution Operator for CNN

    IEEE Access, Vol. 14, pp. 15713-15722

2025

  1. Interlaced 6T-10T CMOS in-memory computing circuit for low silicon area pipelined DNNs

    Proceedings - IEEE International Symposium on Circuits and Systems

  2. Optimizing binary neural network quantization for fixed pattern noise robustness

    Scientific Reports, Vol. 15, Núm. 1

2024

  1. CMOS Pipelined in-Memory Computing Circuit for Column-Wise Image Sensor Architectures

    Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems