Joint Implementation of the Sharing OTA and Bias Current Regulation Techniques in an 11-Bit 10 MS/s Pipelined ADC

  1. Díaz-Madrid, J.Á.
  2. Doménech-Asensi, G.
  3. Martínez-Álvarez, J.J.
  4. Zapata-Pérez, J.
  5. Ruiz-Merino, R.
Aldizkaria:
Circuits, Systems, and Signal Processing

ISSN: 1531-5878 0278-081X

Argitalpen urtea: 2021

Alea: 40

Zenbakia: 2

Orrialdeak: 515-528

Mota: Artikulua

DOI: 10.1007/S00034-020-01493-9 GOOGLE SCHOLAR

Garapen Iraunkorreko Helburuak