Publicaciones en las que colabora con Ginés Doménech Asensi (49)

2023

  1. A 12T SRAM in-Memory Computing differential current architecture for CNN implementations

    Proceedings - IEEE International Symposium on Circuits and Systems

2021

  1. A library-based tool to translate high level DNN models into hierarchical VHDL descriptions

    36th Conference on Design of Circuits and Integrated Systems, DCIS 2021

  2. Joint Implementation of the Sharing OTA and Bias Current Regulation Techniques in an 11-Bit 10 MS/s Pipelined ADC

    Circuits, Systems, and Signal Processing, Vol. 40, Núm. 2, pp. 515-528

2020

  1. All-hardware SIFT implementation for real-time VGA images feature extraction

    Journal of Real-Time Image Processing, Vol. 17, Núm. 2, pp. 371-382

  2. Fixed Pattern Noise Analysis for Feature Descriptors in CMOS APS Images

    Sensing and Imaging, Vol. 21, Núm. 1

  3. Low power 9-bit 500 kS/s 2-stage cyclic ADC using OTA variable bias current

    Analog Integrated Circuits and Signal Processing, Vol. 105, Núm. 1, pp. 45-55

  4. Mixed signal multiply and adder parallel circuit for deep learning convolution operations

    Proceedings - IEEE International Symposium on Circuits and Systems

  5. Using Deep Learning for Defect Classification on a Small Weld X-ray Image Dataset

    Journal of Nondestructive Evaluation, Vol. 39, Núm. 3

2019

  1. Efficient VHDL implementation of an upscaling function for real time video applications

    Proceedings - IEEE International Symposium on Circuits and Systems

  2. Prácticas de circuitos y funciones electrónicas

    Universidad Politécnica de Cartagena

2018

  1. An all-hardware implementation of the subpixel refinement stage in SIFT algorithm

    International Journal of Circuit Theory and Applications

  2. Demo: Results of 'ICaVeats', a project on the integration of architectures and components for embedded vision

    ACM International Conference Proceeding Series

  3. FPGA real time synthesis of simplified SIFT algorithm

    ACM International Conference Proceeding Series

  4. FPGA synthesis of an stereo image matching architecture for autonomous mobile robots

    2017 32nd Conference on Design of Circuits and Integrated Systems, DCIS 2017 - Proceedings

2016

  1. Real time architectures for the scale invariant feature transform algorithm

    International Workshop on Cellular Nanoscale Networks and their Applications

2014

  1. Ambient assisted living system with capacitive occupancy sensor

    Expert Systems

  2. Low-frequency CMOS bandpass filter for PIR sensors in wireless sensor nodes

    IEEE Sensors Journal, Vol. 14, Núm. 11, pp. 4085-4094

  3. Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm

    Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014

2013

  1. An energy efficient middleware for an ad-hoc AAL wireless sensor network

    Ad Hoc Networks, Vol. 11, Núm. 3, pp. 907-925