Publications

View referenced research data.

35 results

2026

  1. A 6T - 11T In-Memory Computing Architecture for Near-Sensor Pipelined Binary Neural Network

    IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 73, Núm. 10, pp. 1036-1040

  2. An Efficient-Energy Charge-Domain Convolution Operator for CNN

    IEEE Access, Vol. 14, pp. 15713-15722

  3. Automatic Segmentation of Ischaemic Stroke Lesions Using Transformers and Convolutional Neural Networks Applied to Multimodal Neuroimaging

    Sensors, Vol. 26, Núm. 16

  4. Cloud-to-Edge Deployment of Optimized nnU-Net for Ischemic Stroke Lesion Segmentation on Resource-Constrained Embedded Devices

    Sensors, Vol. 26, Núm. 11

  5. Enhancing Surgical Planning with AI-Driven Segmentation and Classification of Oncological MRI Scans

    Sensors, Vol. 26, Núm. 1

  6. Metadata Conditioning via Feature-Wise Linear Modulation for Multi-Domain 3D Abdominal Segmentation: A Comparative Study Between U-Net and nnU-Net

    Sensors, Vol. 26, Núm. 13

2025

  1. Enhancing palmprint recognition: a novel customized LOOCV-driven siamese deep-learning network

    Jordanian Journal of Computers and Information Technology, Vol. 11, Núm. 4, pp. 499-516

  2. Fotónica de terahercios (THz): una nueva frontera donde el electromagnetismo y la óptica se encuentran

    web de la Asociación Española de la Industria de Semiconductores (AESEMI)

  3. Interlaced 6T-10T CMOS in-memory computing circuit for low silicon area pipelined DNNs

    Proceedings - IEEE International Symposium on Circuits and Systems

  4. Optimizing binary neural network quantization for fixed pattern noise robustness

    Scientific Reports, Vol. 15, Núm. 1

  5. Vulnerabilidades en redes intra-vehiculares modernas: Un análisis de ataque de denegación de servicio sobre automotive ethernet

    XVII Jornadas de Ingeniería Telemática: Actas de las XVII Jornadas de Ingeniería Telemática (JITEL 2025). Cáceres (España), 12-14 de noviembre de 2025

2024

  1. A real-time and energy-efficient SRAM with mixed-signal in-memory computing near CMOS sensors

    Journal of Real-Time Image Processing, Vol. 21, Núm. 4

  2. Accelerated Simulation of Passive Analog Circuits Over GPU Using Explicit Integration Methods

    Circuits, Systems, and Signal Processing, Vol. 43, Núm. 10, pp. 6115-6131

  3. Advanced Faster-RCNN Model for Automated Recognition and Detection of Weld Defects on Limited X-Ray Image Dataset

    Journal of Nondestructive Evaluation, Vol. 43, Núm. 1

  4. CMOS Pipelined in-Memory Computing Circuit for Column-Wise Image Sensor Architectures

    Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

2023

  1. A 12T SRAM in-Memory Computing differential current architecture for CNN implementations

    Proceedings - IEEE International Symposium on Circuits and Systems

2022

  1. A Stimulator of the Salivary Excretion Based on Physical Vibration of the Parotid Glands

    Computational and mathematical methods in medicine, Vol. 2022, pp. 8252170

  2. Desarrollo de un dispositivo de bajo coste para la recopilación de datos procedentes de sensores agrarios

    Proceedings of the 10th Workshop on Agri-Food Research for young researchers. WIA. 21

  3. On the Use of Bayesian Networks for Real-Time Urban Traffic Measurements: a Case Study with Low-Cost Devices

    Journal of Signal Processing Systems, Vol. 94, Núm. 3, pp. 293-304

2021

  1. A library-based tool to translate high level DNN models into hierarchical VHDL descriptions

    36th Conference on Design of Circuits and Integrated Systems, DCIS 2021