Publications by the researcher in collaboration with José Javier Martínez Álvarez (13)


  1. A library-based tool to translate high level DNN models into hierarchical VHDL descriptions

    36th Conference on Design of Circuits and Integrated Systems, DCIS 2021

  2. Joint Implementation of the Sharing OTA and Bias Current Regulation Techniques in an 11-Bit 10 MS/s Pipelined ADC

    Circuits, Systems, and Signal Processing, Vol. 40, Núm. 2, pp. 515-528


  1. Fixed Pattern Noise Analysis for Feature Descriptors in CMOS APS Images

    Sensing and Imaging, Vol. 21, Núm. 1

  2. Low power 9-bit 500 kS/s 2-stage cyclic ADC using OTA variable bias current

    Analog Integrated Circuits and Signal Processing, Vol. 105, Núm. 1, pp. 45-55

  3. Mixed signal multiply and adder parallel circuit for deep learning convolution operations

    Proceedings - IEEE International Symposium on Circuits and Systems

  4. Using Deep Learning for Defect Classification on a Small Weld X-ray Image Dataset

    Journal of Nondestructive Evaluation, Vol. 39, Núm. 3


  1. Efficient VHDL implementation of an upscaling function for real time video applications

    Proceedings - IEEE International Symposium on Circuits and Systems


  1. An all-hardware implementation of the subpixel refinement stage in SIFT algorithm

    International Journal of Circuit Theory and Applications

  2. FPGA real time synthesis of simplified SIFT algorithm

    ACM International Conference Proceeding Series


  1. Modeling of liquid crystal tunable microwave phase shifter exploiting artificial neural networks

    Proceedings of the IASTED International Conference on Antennas, Radar, and Wave Propagation