H. Neubauer-rekin lankidetzan egindako argitalpenak (4)

2009

  1. Power reduction of a 12-bit 40-MS/s pipeline ADC exploiting partial amplifier sharing

    Proceedings -Design, Automation and Test in Europe, DATE

2008

  1. Comparative analysis of two operational amplifier topologies for a 40MS/s 12-bit pipelined ADC in 0.35 μm CMOS

    Proceedings - 2008 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT

2007

  1. Evaluation of VHDL-AMS models of a high performance ADC

    IEEE International Symposium on Industrial Electronics

2006

  1. VHDL-AMS model of a 40M/S 12 bits pipeline ADC

    Proceedings of the International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2006