A. H. Hauer-rekin lankidetzan egindako argitalpenak (3)

2009

  1. Power reduction of a 12-bit 40-MS/s pipeline ADC exploiting partial amplifier sharing

    Proceedings -Design, Automation and Test in Europe, DATE

2003

  1. CMOS analog implementation of a simplified spinal cord neural model

    Proceedings of SPIE - The International Society for Optical Engineering

  2. Current mode CMOS synthesis of a motor-control neural system

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 2687, pp. 25-32