Publicaciones (79) Publicaciones de Ginés Doménech Asensi

2023

  1. A 12T SRAM in-Memory Computing differential current architecture for CNN implementations

    Proceedings - IEEE International Symposium on Circuits and Systems

2022

  1. On the Use of Bayesian Networks for Real-Time Urban Traffic Measurements: a Case Study with Low-Cost Devices

    Journal of Signal Processing Systems, Vol. 94, Núm. 3, pp. 293-304

2021

  1. A library-based tool to translate high level DNN models into hierarchical VHDL descriptions

    36th Conference on Design of Circuits and Integrated Systems, DCIS 2021

  2. Joint Implementation of the Sharing OTA and Bias Current Regulation Techniques in an 11-Bit 10 MS/s Pipelined ADC

    Circuits, Systems, and Signal Processing, Vol. 40, Núm. 2, pp. 515-528

2020

  1. All-hardware SIFT implementation for real-time VGA images feature extraction

    Journal of Real-Time Image Processing, Vol. 17, Núm. 2, pp. 371-382

  2. Fixed Pattern Noise Analysis for Feature Descriptors in CMOS APS Images

    Sensing and Imaging, Vol. 21, Núm. 1

  3. High-speed analog simulation of CMOS vision chips using explicit integration techniques on many-core processors

    Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020

  4. Low power 9-bit 500 kS/s 2-stage cyclic ADC using OTA variable bias current

    Analog Integrated Circuits and Signal Processing, Vol. 105, Núm. 1, pp. 45-55

  5. Mixed signal multiply and adder parallel circuit for deep learning convolution operations

    Proceedings - IEEE International Symposium on Circuits and Systems

  6. Stability and efficiency of explicit integration in interconnect analysis on GPUs

    Proceedings - IEEE International Symposium on Circuits and Systems

  7. Using Deep Learning for Defect Classification on a Small Weld X-ray Image Dataset

    Journal of Nondestructive Evaluation, Vol. 39, Núm. 3

2019

  1. A low kickback fully differential dynamic comparator for pipeline analog-to-digital converters

    Engineering Reports, Vol. 1, Núm. 4

  2. An efficient numerical solution technique for VLSI interconnect equations on many-core processors

    Proceedings - IEEE International Symposium on Circuits and Systems

  3. Efficient VHDL implementation of an upscaling function for real time video applications

    Proceedings - IEEE International Symposium on Circuits and Systems

  4. Prácticas de circuitos y funciones electrónicas

    Universidad Politécnica de Cartagena

  5. Simulation acceleration of image filtering on CMOS vision chips using many-core processors

    Proceedings of the 2019 Forum on Specification and Design Languages, FDL 2019

2018

  1. An all-hardware implementation of the subpixel refinement stage in SIFT algorithm

    International Journal of Circuit Theory and Applications

  2. Demo: Results of 'ICaVeats', a project on the integration of architectures and components for embedded vision

    ACM International Conference Proceeding Series

  3. FPGA real time synthesis of simplified SIFT algorithm

    ACM International Conference Proceeding Series

  4. FPGA synthesis of an stereo image matching architecture for autonomous mobile robots

    2017 32nd Conference on Design of Circuits and Integrated Systems, DCIS 2017 - Proceedings