José Javier
Martínez Álvarez
Profesor Titular de Universidad
Juan Francisco
Zapata Pérez
Profesor Titular de Universidad
Publications by the researcher in collaboration with Juan Francisco Zapata Pérez (6)
2021
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Joint Implementation of the Sharing OTA and Bias Current Regulation Techniques in an 11-Bit 10 MS/s Pipelined ADC
Circuits, Systems, and Signal Processing, Vol. 40, Núm. 2, pp. 515-528
2020
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Fixed Pattern Noise Analysis for Feature Descriptors in CMOS APS Images
Sensing and Imaging, Vol. 21, Núm. 1
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Low power 9-bit 500 kS/s 2-stage cyclic ADC using OTA variable bias current
Analog Integrated Circuits and Signal Processing, Vol. 105, Núm. 1, pp. 45-55
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Mixed signal multiply and adder parallel circuit for deep learning convolution operations
Proceedings - IEEE International Symposium on Circuits and Systems
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Using Deep Learning for Defect Classification on a Small Weld X-ray Image Dataset
Journal of Nondestructive Evaluation, Vol. 39, Núm. 3
2018
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An all-hardware implementation of the subpixel refinement stage in SIFT algorithm
International Journal of Circuit Theory and Applications