Publications dans lesquelles il/elle collabore avec José Ángel Díaz Madrid (4)

2020

  1. Low power 9-bit 500 kS/s 2-stage cyclic ADC using OTA variable bias current

    Analog Integrated Circuits and Signal Processing, Vol. 105, Núm. 1, pp. 45-55

  2. Mixed signal multiply and adder parallel circuit for deep learning convolution operations

    Proceedings - IEEE International Symposium on Circuits and Systems

2018

  1. An all-hardware implementation of the subpixel refinement stage in SIFT algorithm

    International Journal of Circuit Theory and Applications