José Javier
Martínez Álvarez
Profesor Titular de Universidad
Pablo
Rubio Ibáñez
Publicacións nas que colabora con Pablo Rubio Ibáñez (4)
2021
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A library-based tool to translate high level DNN models into hierarchical VHDL descriptions
36th Conference on Design of Circuits and Integrated Systems, DCIS 2021
2019
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Efficient VHDL implementation of an upscaling function for real time video applications
Proceedings - IEEE International Symposium on Circuits and Systems
2018
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An all-hardware implementation of the subpixel refinement stage in SIFT algorithm
International Journal of Circuit Theory and Applications
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FPGA real time synthesis of simplified SIFT algorithm
ACM International Conference Proceeding Series