José Javier Martínez Álvarez-rekin lankidetzan egindako argitalpenak (5)

2021

  1. Joint Implementation of the Sharing OTA and Bias Current Regulation Techniques in an 11-Bit 10 MS/s Pipelined ADC

    Circuits, Systems, and Signal Processing, Vol. 40, Núm. 2, pp. 515-528

2020

  1. Fixed Pattern Noise Analysis for Feature Descriptors in CMOS APS Images

    Sensing and Imaging, Vol. 21, Núm. 1

  2. Mixed signal multiply and adder parallel circuit for deep learning convolution operations

    Proceedings - IEEE International Symposium on Circuits and Systems

  3. Using Deep Learning for Defect Classification on a Small Weld X-ray Image Dataset

    Journal of Nondestructive Evaluation, Vol. 39, Núm. 3

2018

  1. An all-hardware implementation of the subpixel refinement stage in SIFT algorithm

    International Journal of Circuit Theory and Applications