José Ángel
Díaz Madrid
Investigador en el periodo 2009-2010
Ramón Jesús
Ruiz Merino
Catedrático de Universidad
Publicaciones en las que colabora con Ramón Jesús Ruiz Merino (13)
2020
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All-hardware SIFT implementation for real-time VGA images feature extraction
Journal of Real-Time Image Processing, Vol. 17, Núm. 2, pp. 371-382
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Mixed signal multiply and adder parallel circuit for deep learning convolution operations
Proceedings - IEEE International Symposium on Circuits and Systems
2018
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An all-hardware implementation of the subpixel refinement stage in SIFT algorithm
International Journal of Circuit Theory and Applications
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FPGA synthesis of an stereo image matching architecture for autonomous mobile robots
2017 32nd Conference on Design of Circuits and Integrated Systems, DCIS 2017 - Proceedings
2014
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Low-frequency CMOS bandpass filter for PIR sensors in wireless sensor nodes
IEEE Sensors Journal, Vol. 14, Núm. 11, pp. 4085-4094
2013
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Synthesis of CMOS analog circuit VHDL-AMS descriptions using parameterizable macromodels
International Journal of Circuit Theory and Applications, Vol. 41, Núm. 7, pp. 732-742
2009
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Power reduction of a 12-bit 40-MS/s pipeline ADC exploiting partial amplifier sharing
Proceedings -Design, Automation and Test in Europe, DATE
2008
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Accurate and reusable macromodeling technique using a fuzzy-logic approach
Proceedings - IEEE International Symposium on Circuits and Systems
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Comparative analysis of two operational amplifier topologies for a 40MS/s 12-bit pipelined ADC in 0.35 μm CMOS
Proceedings - 2008 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT
2003
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An analogue current-mode hardware design proposal for preprocessing layers in ART-based neural networks
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 2687, pp. 97-104
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CMOS analog implementation of a simplified spinal cord neural model
Proceedings of SPIE - The International Society for Optical Engineering
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Current mode CMOS synthesis of a motor-control neural system
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 2687, pp. 25-32
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Current-mode implementation of processing modules in ART-based neural networks
Proceedings of SPIE - The International Society for Optical Engineering