Evaluation of stereo correspondence algorithms and their implementation on FPGA

  1. Colodro-Conde, C.
  2. Toledo-Moreo, F.J.
  3. Toledo-Moreo, R.
  4. Martínez-Álvarez, J.J.
  5. Garrigós Guerrero, J.
  6. Ferrández-Vicente, J.M.
Journal:
Journal of Systems Architecture

ISSN: 1383-7621

Year of publication: 2014

Volume: 60

Issue: 1

Pages: 22-31

Type: Article

DOI: 10.1016/J.SYSARC.2013.11.006 GOOGLE SCHOLAR