Evaluation of stereo correspondence algorithms and their implementation on FPGA

  1. Colodro-Conde, C.
  2. Toledo-Moreo, F.J.
  3. Toledo-Moreo, R.
  4. Martínez-Álvarez, J.J.
  5. Garrigós Guerrero, J.
  6. Ferrández-Vicente, J.M.
Aldizkaria:
Journal of Systems Architecture

ISSN: 1383-7621

Argitalpen urtea: 2014

Alea: 60

Zenbakia: 1

Orrialdeak: 22-31

Mota: Artikulua

DOI: 10.1016/J.SYSARC.2013.11.006 GOOGLE SCHOLAR