Publicaciones en las que colabora con T.J. Kazmierski (7)

2020

  1. High-speed analog simulation of CMOS vision chips using explicit integration techniques on many-core processors

    Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020

  2. Stability and efficiency of explicit integration in interconnect analysis on GPUs

    Proceedings - IEEE International Symposium on Circuits and Systems

2019

  1. An efficient numerical solution technique for VLSI interconnect equations on many-core processors

    Proceedings - IEEE International Symposium on Circuits and Systems

  2. Simulation acceleration of image filtering on CMOS vision chips using many-core processors

    Proceedings of the 2019 Forum on Specification and Design Languages, FDL 2019

2017

  1. Generation of new power processing structures exploiting genetic programming

    IEEE International Symposium on Industrial Electronics

2002

  1. Automated high level synthesis of hardware building blocks present in art-based neural networks, from VHDL-AMS descriptions

    Proceedings - IEEE International Symposium on Circuits and Systems, Vol. 4, pp. 77-80

2000

  1. Architectural synthesis of high-level analogue VHDL-AMS descriptions using netlist extraction from parse trees

    Electronics Letters, Vol. 36, Núm. 20, pp. 1680-1682