Automated high level synthesis of hardware building blocks present in art-based neural networks, from VHDL-AMS descriptions

  1. López, J.A.
  2. Doménech, G.
  3. Ruiz, R.
  4. Kazmierski, T.J.
Aldizkaria:
Proceedings - IEEE International Symposium on Circuits and Systems

ISSN: 0271-4310

Argitalpen urtea: 2002

Alea: 4

Orrialdeak: 77-80

Mota: Artikulua

DOI: 10.1109/ISCAS.2002.1010392 GOOGLE SCHOLAR

Garapen Iraunkorreko Helburuak

Datuen iturria: Scopus