Automated high level synthesis of hardware building blocks present in art-based neural networks, from VHDL-AMS descriptions

  1. López, J.A.
  2. Doménech, G.
  3. Ruiz, R.
  4. Kazmierski, T.J.
Revista:
Proceedings - IEEE International Symposium on Circuits and Systems

ISSN: 0271-4310

Ano de publicación: 2002

Volume: 4

Páxinas: 77-80

Tipo: Artigo

DOI: 10.1109/ISCAS.2002.1010392 GOOGLE SCHOLAR
Fonte de datos: Scopus