Publications (29) Publications de José Ángel Díaz Madrid

2024

  1. A real-time and energy-efficient SRAM with mixed-signal in-memory computing near CMOS sensors

    Journal of Real-Time Image Processing, Vol. 21, Núm. 4

2023

  1. A 12T SRAM in-Memory Computing differential current architecture for CNN implementations

    Proceedings - IEEE International Symposium on Circuits and Systems

2022

  1. A Stimulator of the Salivary Excretion Based on Physical Vibration of the Parotid Glands

    Computational and mathematical methods in medicine, Vol. 2022, pp. 8252170

2021

  1. Aproximación al diseño de prácticas de laboratorio adaptativas a entornos de alta ibilidad entre la educación presencial y virtual.

    IX Congreso Internacional Multidisciplinar de Investigación Educativa 1 y 2 de Julio 2021: Libro de actas #CIMIE21

  2. Joint Implementation of the Sharing OTA and Bias Current Regulation Techniques in an 11-Bit 10 MS/s Pipelined ADC

    Circuits, Systems, and Signal Processing, Vol. 40, Núm. 2, pp. 515-528

  3. Students' perceptions of key competencies supporting work-integrated learning

    International Journal of Engineering Education, Vol. 37, Núm. 5, pp. 1330-1342

2020

  1. All-hardware SIFT implementation for real-time VGA images feature extraction

    Journal of Real-Time Image Processing, Vol. 17, Núm. 2, pp. 371-382

  2. Low power 9-bit 500 kS/s 2-stage cyclic ADC using OTA variable bias current

    Analog Integrated Circuits and Signal Processing, Vol. 105, Núm. 1, pp. 45-55

  3. Mixed signal multiply and adder parallel circuit for deep learning convolution operations

    Proceedings - IEEE International Symposium on Circuits and Systems

2019

  1. A low kickback fully differential dynamic comparator for pipeline analog-to-digital converters

    Engineering Reports, Vol. 1, Núm. 4

  2. Las prácticas externas como herramienta para el análisis de las competencias del Grado en Ingeniería en Organización Industrial del CUD de San Javier.

    VIII congreso internacional multidisciplinar de investigación educativa : Libro de actas #CIMIE19: Educación: la puerta a toda mejora

2018

  1. An all-hardware implementation of the subpixel refinement stage in SIFT algorithm

    International Journal of Circuit Theory and Applications

  2. Análisis de las competencias del Grado en Ingeniería de Organización Industrial del CUD de San Javier a través de las prácticas externas

    CertiUni Journal, Núm. 4, pp. 41-50

  3. FPGA synthesis of an stereo image matching architecture for autonomous mobile robots

    2017 32nd Conference on Design of Circuits and Integrated Systems, DCIS 2017 - Proceedings

2017

  1. An 11-bit 20-MSample/s pipelined ADC with OTA bias current regulation to optimize power dissipation

    Proceedings - IEEE International Symposium on Circuits and Systems

2016

  1. A reconfigurable two-stage cyclic ADC for low-power applications in 3.3 V 0.35 µm CMOS

    International Journal of Electronics, Vol. 103, Núm. 12, pp. 1998-2012

  2. Técnicas para la reducción del consumo en ADCs de topología pipeline

    IV Congreso Nacional de i+d en Defensa y Seguridad DESEi+d 2016: Actas, 16, 17 y 18 de noviembre de 2016 (Centro Universitario de la Defensa (Academia General del Aire)), pp. 13-20

2014

  1. Low-frequency CMOS bandpass filter for PIR sensors in wireless sensor nodes

    IEEE Sensors Journal, Vol. 14, Núm. 11, pp. 4085-4094

2013

  1. Synthesis of CMOS analog circuit VHDL-AMS descriptions using parameterizable macromodels

    International Journal of Circuit Theory and Applications, Vol. 41, Núm. 7, pp. 732-742

2010

  1. Fuzzy logic technique for accurate analog circuits macromodel sizing

    International Journal of Circuit Theory and Applications, Vol. 38, Núm. 3, pp. 307-319